The 80th JSAP Autumn Meeting, 2019
Ge transistor and selective grown process of graphene were remarkable

September 18 - 21, The 80th JSAP Autumn Meeting, 2019 was held in Hokkaido University. Topics of LTPS-TFT-LCD, OLED, organic-TFT, and manufacturing technology are closed up based on the proceeding.

Variability of LTPS-TFT property is reduced by the SLA method using dot mask transfer

First of all, as regards LTPS-TFT-LCD, the research group of Kyushu University, V-TECHNOLOGY, and Tohoku University reported property of LTPS-TFT, which was manufactured by Selective Laser Annealing (SLA) method using Micro Lens Array (MLA). In general, if laser beam is irradiated by SLA method using a fixed optics system, grain boundary becomes to be ununiform compared to that of the conventional scanning method, as a result, TFT properties such as carrier mobility, Vth become to be unstable. For this reason, the research group used dot mask transfer technology using contracted projection optics system and succeeded to form uniform square grain in the TFT channel.

Fig.2 VG-ID transfers of LTPS TFTs at VD = 0.05 V irradiated1) (a) without mask at the fluence of 500-800 mJ/cm2 and 20 shots, (b) with a dot mask at the fluence of 700-1000 mJ/cm2 and 10 shots.

Fig.1 Schematic diagram of the SLA1)

In this experience, KrF excimer laser (wavelength 248nm was used. The laser beam was irradiated into 150 × 150 μm at dot-mask pattern. Firstly, a-Si film was deposited on the silicon wafer at 100 nm thickness by the CVD method. The next, a-Si film was crystalized to poly-Si film by the above method, and then, was patterned by the lithography process. Subsequently, SiO2 gate insulator (100 nm) and TiN electrode (150nm) were deposited and patterned. Finally, arsenic ion was implanted into source/drain area at 140keV, 5×15cm^-2, and then, device was annealed at 650 ℃ for 6 hours.

Figure 2 shows VG-ID transfers of LTPS-TFTs. TFT property of device made by dot mask transfer (b) was not easy to be influenced by laser intensity. Position and size of grain in produced device without dot mask technology are easy to be changed by laser influence；the other hand, grain core in produced device with dot-mask transfer is formed at masking area and grain is melted in irradiated area, as a result, square grain is uniformly formed in the channel because of acceleration of lateral growth. In fact, variability of TFT property (N = 8) was improved from 17 % (without dot-mask transfer) to 3 % (with dot-mask transfer). In short, variability of TFT property can be greatly reduced by the dot mask transfer technology.

Ge transistor emerges as a high quality flexible TFT rapidly

As concerns Ge transistor, the research group of Tsukuba University and Japan Society for the Promotion of Science reported that plastic substrate device with high carrier mobility same as that of glass substrate device was obtained.

In this primary experience, GeO2 film was deposited on the substrates (quartz glass and plastic film) at 50 nm thickness by the sputtering method, and amorphous Ge film was deposited at 100 - 150 nm thickness by molecular beam epitaxy method with 150 ℃ annealing. Finally, these samples were annealed in N2 environment at 375 ℃ for 150 hours due to acceleration of solid-phase growth.

Fig.4 Ge thickness dependence of the electrical properties of the poly-Ge layers.2) (a) Average grain size. (b) Hole concentration and hole mobility

Fig.3 (a) Raman spectra of the samples. (b) Peak shifts from the Ge substrate (c) FWHMs of the Ge-Gepeaks2)

As figure 3, Raman spectra of the samples was shifted toward different orientation with respect to kind of the substrate. In short, tension distortion in the glass substrate and compressed distortion in the plastic film were observed. This result is correspondent with distortion amount, which is estimated from difference in coefficient of thermal expansion between substrate and Ge film. And also, as figure 3-(c), FWHMs of Ge-Gepeaks were almost same in the both samples. In short, same crystalline nature can be obtain regardless of substrate kind. Figure 4 shows Ge thickness dependence of electrical properties of poly-Ge layers. Gran size and electrical properties of the plastic device was almost same as that of the glass device in all thickness ranges.

Fig.5 Hole mobility and concentration of Ge on insulators2)

Based on above result, Ge film was deposited on high heat resistance polyimide film, and crystalized, and sample was annealed at 500 ℃ for 5 hours. As a result, hole mobility was increased from 500 cm²/Vs to 670 cm²/Vs because of suppression of impurities scattering. This is higher than that of the glass device and is maximum in low temperature deposited films on insulator substrate. Therefore, a flexible device with extremely high quality can be expected to be practical use.

Property of inverted OLED is furthermore enhanced by EIL with a new additive

The research group of University of Tokyo, NHK, Nihon Shokubai, and Oosaka University reported to enhance luminance efficiency and lifetime characteristics of the inverted OLED, which was developed using an original electron injection layer instead of conventional Alkali metal material.

Fig.6 (a)DBN (b)DBU (c)N-DMBI3)

The research group reported to obtain long lifetime of the inverted OLED by coating compound inclusive of boron as an electron injection material in the past. However, if it's used as only electron injection material, driving voltage of device increases. Therefore, it's necessary to dope an additive agent, for example, 4-(1,3-dimethyl-2,3-dihydro-1-H benzoimidazol-2yl)phenyl)dimethylamine (N-DMBI). For this reason, some amidine derivatives, for example, DBU, 1,5-diazabicyclo[4.3.0]non-5-ene (DBN) were doped into electron injection material as an additive agent.

Fig.7 JV-characteristics3)

Device Max EQE (%) LT90 (hour) undoped 11.4 608 N-DMBI doped 14.4 438  DBN doped 15.3  1440  DBU doped   13.6 212

Table.1 EQE and lifetime3)

Pilot-produced device is composed of ITO (150 nm)/ZnO/organic EIL/Zn(BTZ)2 (10 nm)/Zn(BTZ)2:Ir(piq)3(6wt%, 20 nm)/DBTPB (10 nm)/α-NPD (40 nm)/HAT-CN (10 nm)/Al (100 nm).

Figure 6 shows molecular structure of amidine derivative and N-DMBI. As figure 7, driving voltage of device is reduced by doping amidine derivative. And also, driving voltage of DBN device was lower than that of DBU device. As table 1, in DBN device, maximum quantum efficiency was obtained. This is reason why all injected electrons changed to emission energy by efficient electron injection from cathode.

Metal halide perovskite thick film is used as carrier transporting layers of OLED

Fig.8 Cross-section structure of OLED using MAPbCl3 carrier transporting layer4)

On the other hand, the research group of Kyushu University and Japan Science and Technology Agency (JST) proposed to use transparent metal halide Perovskite MAPbCl3 in visible range as carrier transporting layers of OLED. It's easy to manufacture an OLED by using thick MAPbCl3 film as hole and electron transporting layers in this approach.

As you know, angle dependence of emission spectrum in the conventional OLED happens because light cross-talk occurs between in emission area and metal electrode. By contrast, as figure 8, light cross-talk never occurs because of insert of thick Perovskite film (1000 nm thickness) in between emitting layer and metal electrode. As a result, angle dependence of emission spectrum becomes to disappear. And also, if thickness of this Perovskite film is 2000 nm and over, high quantum efficiency same as 40 % was obtained. Furthermore, driving voltage and lifetime was practical level.

Hole injection property of OTFT is improved by oxidation of Ag Nano size ink electrode

Fig.10 Transfer characteristics5)

Fig.9 Patterning process of Ag nano-ink electrode5)

As regards organic-TFT, the research group of National Institute of Technology, Nagaoka College and Niigata University announced to enhance carrier injection property of organic-TFT by surface treatment of solution-processed Nano Size Ag electrode.

In this experience, n+ silicon wafer with OTS (octadecyl-tri-ethoxy-silane) treated SiO2 film was used as a substrate. As figure 9, Nano size Ag ink electrode was coated and patterned at the same time by surface treatment patterning process, and then, it was treated by UV light irradiation in O3 environment. The next, this sample was treated by OTS again. Finally, DPA (9,10-diphenylanthracene) liquid inclusive of chlorobenzene(C6H5Cl) solvent was spin-coated as an organic semiconductor layer.

Figure 10 shows transfer characteristics of the sample. Ag/coated DPA device without oxidized treatment of Ag electrode could not operate as a transistor. On the other hand, oxidized Ag/coated DPA deice (oxidized treated for 600 seconds) could operate normally as a transistor, in common with DPA evaporated device, too. Concretely, ID and carrier mobility were 126.2 μA and 0.35 cm²/Vs respectively. This is reason why hole injection property is increased because of reduction of contact resistance by oxidized treatment of Ag electrode in solution-processed device.

After patterning of Cu catalyst in advance, graphene film is selectively grown

National Institute of Information and Communications Technology (NICT）reported a new patterning process of graphene film, which was a new and old Nano size material, too.

Fig.11 (a) Photograph of a patterned copper thin films. (b) Raman spectra corresponding to the position �@ to �B in (a). 6)

In this experience, first of all, a photoresist is coated and patterned on the substrate (glass or silicon wafer), and then, Cu film is deposited and patterned at 500 nm thickness by the evaporation method and the lift-off method. The next, sample is annealed at 1000 ℃, Ar/H2 (3%) environment. Finally, graphene is grown on Cu catalyst selectively by the CVD process at 1000 ℃, CH4 and Ar/H2(3%) environment.

Figure 11 shows photograph of a patterned Cu thin films. (b) is Raman spectra corresponding to the position �@ to �B in (a). Graphene was not observed on SiO2 film from spectrum. On the other hand, peaks of 2D and G band of graphene were observed on patterned Cu film. And also, it was estimated to be not single graphene, but multi graphene.

Reference
1)Imokawa, et.al.：Characterization of Low-temperature Poly-Si Thin-film Transistors Fabricated by Grain-Growth Controlled Selective-Laser-Annealing, The 80th JSAP Autumn Meeting, 2019, 12-027(2019.9)
2)Imajo, et.al.：Direct synthesis of high hole mobility (670 cm²/Vs) Ge thin film on a plastic substrate, The 80th JSAP Autumn Meeting, 2019, 12-034(2019.9)
3)Suzuki, et.al.：Highly efficient long-life inverted OLEDs by an amidine-derivative doping electron injection layer, The 80th JSAP Autumn Meeting, 2019, 11-148(2019.9)
4)Matsushima, et.al.：Thick-film organic light-emitting diodes with metal halide perovskite transport layers, The 80th JSAP Autumn Meeting, 2019, 11-217(2019.9)5)Sone, et.al.：Effect of Oxidation Treatment on Ag Nano-ink Electrode Surface in Wet-processed OFET, The 80th JSAP Autumn Meeting, 2019, 11-564(2019.9)
6)Tominari, et.al.：Graphene growth using patterned metal thin film, The 80th JSAP Autumn Meeting, 2019, 15-121(2019.9)